データシートサーチシステム |
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LM46002QPWPTQ1 データシート(PDF) 6 Page - Texas Instruments |
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LM46002QPWPTQ1 データシート(HTML) 6 Page - Texas Instruments |
6 / 60 page 6 LM46002-Q1, LM46002A-Q1 SNVSAA2B – JULY 2015 – REVISED JULY 2017 www.ti.com Product Folder Links: LM46002-Q1 LM46002A-Q1 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated Electrical Characteristics (continued) Limits apply over the recommended operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 24 V, VOUT = 3.3 V, FS = 500 kHz. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (1) Ensured by design. Not production tested. (2) Measured at package pins VOLTAGE REFERENCE (FB PIN) VFB Feedback voltage TJ = 25°C 1.004 1.011 1.018 V TJ = –40°C to 125°C 0.994 1.011 1.030 ILKG-FB Input leakage current at FB pin FB = 1.011 V 0.2 65 nA THERMAL SHUTDOWN TSD (1) Thermal shutdown Shutdown threshold 160 °C Recovery threshold 150 °C CURRENT LIMIT AND HICCUP IHS-LIMIT Peak inductor current limit 3.6 4.5 5 A ILS-LIMIT Valley inductor current limit 1.8 2.05 2.3 A SOFT START (SS/TRK PIN) ISSC Soft-start charge current 1.17 2 2.75 µA RSSD Soft-start discharge resistance UVLO, TSD, OCP, or EN = 0 V 16 kΩ POWER GOOD (PGOOD PIN) VPGOOD-HIGH Power-good flag overvoltage tripping threshold % of FB voltage 110% 113% VPGOOD-LOW Power-good flag undervoltage tripping threshold % of FB voltage 80% 88% VPGOOD-HYS Power-good flag recovery hysteresis % of FB voltage 6% RPGOOD PGOOD pin pull down resistance when power bad VEN = 3.3 V 69 150 Ω VEN = 0 V 150 350 MOSFETS(2) RDS-ON-HS High-side MOSFET ON-resistance IOUT = 1 A VBIAS = VOUT = 3.3 V 210 mΩ RDS-ON-LS Low-side MOSFET ON-resistance IOUT = 1 A VBIAS = VOUT = 3.3 V 110 mΩ 6.6 Timing Requirements PARAMETER MIN NOM MAX UNIT CURRENT LIMIT AND HICCUP NOC Hiccup wait cycles when LS current limit tripped 32 Cycles TOC Hiccup retry delay time 5.5 ms SOFT START (SS/TRK PIN) TSS Internal soft-start time when SS pin open circuit 4.1 ms POWER GOOD (PGOOD PIN) TPGOOD-RISE Power-good flag rising transition deglitch delay 220 µs TPGOOD-FALL Power-good flag falling transition deglitch delay 220 µs |
同様の部品番号 - LM46002QPWPTQ1 |
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同様の説明 - LM46002QPWPTQ1 |
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