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GS8673ED36BK-550 データシート(PDF) 10 Page - GSI Technology |
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GS8673ED36BK-550 データシート(HTML) 10 Page - GSI Technology |
10 / 31 page GS8673ED18/36BK-675/625/550/500 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.06 5/2012 10/31 © 2011, GSI Technology Low Power NOP Mode When input termination is enabled on the Address (SA) and Write Data (D) inputs, those inputs can be placed in Low Power NOP (LP NOP) mode via the synchronous ADZT1 input. When NOP operations are initiated with ADZT1 High, the termination pull-ups on the SA and D inputs are disabled, thereby reducing the DC power associated with those inputs. LP NOP Truth Table R W ADZT1 Current Operation SA, D Pull-Up ↑CK (tn) ↑CK (tn) ↑CK (tn) (tn) ↑CK (tn+2) X X 0 Any Enabled X X 1 Any Disabled Notes: 1. 1 = input High; 0 = input Low; X = input don’t care. 2. ADZT1 should only be driven High during NOP operations; SA, D input timing is not guaranteed in LP NOP Mode. 3. SA, D should be driven Low (or tri-stated) during LP NOP Mode, to take advantage of the power-saving feature. LP NOP Timing Specifications Parameter Symbol Min Max Units CK Clock High to SA Pull-up Enable / Disable tKHAZTV 0 2.0 ns CK Clock High to D Pull-Up Enable / Disable tKHDZTV –0.4 0.4 ns |
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同様の説明 - GS8673ED36BK-550 |
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