データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

GS8672D37BE-300 データシート(PDF) 6 Page - GSI Technology

部品番号 GS8672D37BE-300
部品情報  JEDEC-standard pinout and package
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  GSI [GSI Technology]
ホームページ  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8672D37BE-300 データシート(HTML) 6 Page - GSI Technology

Back Button GS8672D37BE-300 Datasheet HTML 2Page - GSI Technology GS8672D37BE-300 Datasheet HTML 3Page - GSI Technology GS8672D37BE-300 Datasheet HTML 4Page - GSI Technology GS8672D37BE-300 Datasheet HTML 5Page - GSI Technology GS8672D37BE-300 Datasheet HTML 6Page - GSI Technology GS8672D37BE-300 Datasheet HTML 7Page - GSI Technology GS8672D37BE-300 Datasheet HTML 8Page - GSI Technology GS8672D37BE-300 Datasheet HTML 9Page - GSI Technology GS8672D37BE-300 Datasheet HTML 10Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 28 page
background image
GS8672D19/37BE-450/400/375/333/300
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02c 8/2017
6/28
© 2011, GSI Technology
Power-Up Sequence for SigmaQuad-II+ ECCRAMs
SigmaQuad-II+ ECCRAMs must be powered-up in a specific sequence in order to avoid undefined operations.
1. After power supplies power-up and clocks (K, K) are stablized, 163,840 cycles are required to set Output Driver
Impedance.
2. Thereafter, an additional 65,536 clock cycles are required to lock the DLL after it has been enabled.
3. Begin Read and Write operations.
For more information, read AN1021 SigmaQuad and SigmaDDR Power-Up.
On-Chip Error Correction
SigmaQuad-II+ ECCRAMs implement a single-bit error detection and correction algorithm (specifically, a Hamming Code) on
each DDR data word (comprising two 9-bit data bytes) transmitted on each 9-bit data bus (i.e., transmitted on D/Q[8:0], D/Q[17:9],
D/Q[26:18], or D/Q[35:27]). To accomplish this, 5 ECC parity bits (invisible to the user) are utilized per every 18 data bits (visible
to the user).
The ECC algorithm neither corrects nor detects multi-bit errors. However, GSI ECCRAMs are architected in such a way that a
single SER event very rarely causes a multi-bit error across any given "transmitted data unit", where a "transmitted data unit"
represents the data transmitted as the result of a single read or write operation to a particular address. The extreme rarity of multi-
bit errors results in the SER mentioned previously (i.e., <0.002 FITs/Mb measured at sea level).
Not only does the on-chip ECC significantly improve SER performance, but it also frees up the entire memory array for data
storage. Very often SRAM applications allocate 1/9th of the memory array (i.e., one "error bit" per eight "data bits", in any 9-bit
"data byte") for error detection (either simple parity error detection, or system-level ECC error detection and correction). Such
error-bit allocation is unnecessary with ECCRAMs —the entire memory array can be utilized for data storage, effectively
providing 12.5% greater storage capacity compared to SRAMs of the same density not equipped with on-chip ECC.


同様の部品番号 - GS8672D37BE-300

メーカー部品番号データシート部品情報
logo
GSI Technology
GS8672D37BE-333I GSI-GS8672D37BE-333I Datasheet
483Kb / 28P
   72Mb SigmaQuadTM-II Burst of 4 ECCRAMTM
More results

同様の説明 - GS8672D37BE-300

メーカー部品番号データシート部品情報
logo
GSI Technology
GS8342DT38BD-550 GSI-GS8342DT38BD-550 Datasheet
524Kb / 30P
   JEDEC-standard pinout and package
GS8342QT37BD-300I GSI-GS8342QT37BD-300I Datasheet
503Kb / 29P
   JEDEC-standard pinout and package
GS8662Q37BD-333I GSI-GS8662Q37BD-333I Datasheet
502Kb / 28P
   JEDEC-standard pinout and package
GS8662QT19BGD-357 GSI-GS8662QT19BGD-357 Datasheet
501Kb / 28P
   JEDEC-standard pinout and package
GS81302DT10GE-350 GSI-GS81302DT10GE-350 Datasheet
513Kb / 30P
   JEDEC-standard pinout and package
GS82582D37GE-400I GSI-GS82582D37GE-400I Datasheet
443Kb / 26P
   JEDEC-standard pinout and package
GS81302DT10E-350I GSI-GS81302DT10E-350I Datasheet
513Kb / 30P
   JEDEC-standard pinout and package
GS81302DT37AGD-450 GSI-GS81302DT37AGD-450 Datasheet
436Kb / 25P
   JEDEC-standard pinout and package
GS81302Q10GE-250I GSI-GS81302Q10GE-250I Datasheet
487Kb / 28P
   JEDEC-standard pinout and package
GS82582Q37GE-333I GSI-GS82582Q37GE-333I Datasheet
436Kb / 25P
   JEDEC-standard pinout and package
GS8182D19BGD-333I GSI-GS8182D19BGD-333I Datasheet
554Kb / 27P
   JEDEC-standard pinout and package
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com