データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

GS8672Q38BE-400 データシート(PDF) 9 Page - GSI Technology

部品番号 GS8672Q38BE-400
部品情報  On-Chip ECC with virtually zero SER
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  GSI [GSI Technology]
ホームページ  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8672Q38BE-400 データシート(HTML) 9 Page - GSI Technology

Back Button GS8672Q38BE-400 Datasheet HTML 5Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 6Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 7Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 8Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 9Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 10Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 11Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 12Page - GSI Technology GS8672Q38BE-400 Datasheet HTML 13Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 28 page
background image
Separate I/O SigmaQuad-II+ ECCRAM Read Truth Table
A
R
Output Next State
Q
Q
K
(tn)
K
(tn)
K
(tn)
K
(tn+2½)
K
(tn+3)
X
1
Deselect
Hi-Z/0
Hi-Z/0
V
0
Read
Q0
Q1
Notes:
1. X = Don’t Care, 1 = High, 0 = Low, V = Valid.
2. R is evaluated on the rising edge of K.
3. Q0 and Q1 are the first and second data output transfers in a read.
4. Users should not clock in metastable addresses.
5. When On-Die Termination is disabled (ODT = 0), Q drivers are disabled (i.e., Q pins are tri-stated) for one cycle in response to NOP and
Write commands, 2.5 cycles after the command is sampled.
6. When On-Die Termination is enabled (ODT = 1), Q drivers are enabled Low (i.e., Q pins are driven Low) for one cycle in response to
NOP and Write commands, 2.5 cycles after the command is sampled. This is done so that the ASIC/Controller can enable On-Die
Termination on its data inputs without having to cope with the termination pulling tri-stated data inputs to VDDQ/2 (i.e., to the switch point
of the data input receivers).
GS8672Q20/38BE-500/450/400
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01c 8/2017
9/28
© 2011, GSI Technology
Separate I/O SigmaQuad-II+ ECCRAM Write Truth Table
A
W
BWn
BWn
Input Next State
D
D
K
(tn + ½)
K
(tn)
K
(tn)
K
(tn + ½)
K
K 
(tn), (tn + ½)
K
(tn)
K
(tn + ½)
V
0
0
0
Write Byte Dx0, Write Byte Dx1
D0
D1
V
0
0
1
Write Byte Dx0, Write Abort Byte Dx1
D0
X
V
0
1
0
Write Abort Byte Dx0, Write Byte Dx1
X
D1
X
0
1
1
Write Abort Byte Dx0, Write Abort Byte Dx1
X
X
X
1
X
X
Deselect
X
X
Notes:
1. X = Don’t Care, H = High, L = Low, V = Valid.
2. W is evaluated on the rising edge of K.
3. D0 and D1 are the first and second data input transfers in a write.
4. BWn represents any of the Byte Write Enable inputs (BW0, BW1, etc.).


同様の部品番号 - GS8672Q38BE-400

メーカー部品番号データシート部品情報
logo
GSI Technology
GS8672Q38BE-400 GSI-GS8672Q38BE-400 Datasheet
457Kb / 28P
   On-Chip ECC with virtually zero SER
GS8672Q38BE-400I GSI-GS8672Q38BE-400I Datasheet
457Kb / 28P
   On-Chip ECC with virtually zero SER
More results

同様の説明 - GS8672Q38BE-400

メーカー部品番号データシート部品情報
logo
GSI Technology
GS8673ED36BK-625I GSI-GS8673ED36BK-625I Datasheet
457Kb / 31P
   On-Chip ECC with virtually zero SER
GS8673EQ18BK-625 GSI-GS8673EQ18BK-625 Datasheet
451Kb / 31P
   On-Chip ECC with virtually zero SER
GS8672Q38BE-450I GSI-GS8672Q38BE-450I Datasheet
457Kb / 28P
   On-Chip ECC with virtually zero SER
GS8673ED18BGK-625 GSI-GS8673ED18BGK-625 Datasheet
457Kb / 31P
   On-Chip ECC with virtually zero SER
GS8673ED36BK-550 GSI-GS8673ED36BK-550 Datasheet
457Kb / 31P
   On-Chip ECC with virtually zero SER
GS8672D37BGE-375 GSI-GS8672D37BGE-375 Datasheet
483Kb / 28P
   On-Chip ECC with virtually zero SER
GS8672D20BGE-633 GSI-GS8672D20BGE-633 Datasheet
483Kb / 30P
   On-Chip ECC with virtually zero SER
GS8672Q19BGE-300 GSI-GS8672Q19BGE-300 Datasheet
475Kb / 27P
   On-Chip ECC with virtually zero SER
GS8673ED36BK-675I GSI-GS8673ED36BK-675I Datasheet
457Kb / 31P
   On-Chip ECC with virtually zero SER
GS8673EQ36BGK-675 GSI-GS8673EQ36BGK-675 Datasheet
451Kb / 31P
   On-Chip ECC with virtually zero SER
GS8672D20BE-450I GSI-GS8672D20BE-450I Datasheet
483Kb / 30P
   On-Chip ECC with virtually zero SER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com