データシートサーチシステム |
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GS81302DT37AGD-375 データシート(PDF) 7 Page - GSI Technology |
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GS81302DT37AGD-375 データシート(HTML) 7 Page - GSI Technology |
7 / 25 page Separate I/O SigmaQuad II+ B4 SRAM Truth Table Previous Operation A R W Current Operation D D D D Q Q Q Q K (tn-1) K (tn) K (tn) K (tn) K (tn) K (tn+1) K (tn+1½) K (tn+2) K (tn+2½) K (tn+2) K (tn+2½) K (tn+3) K (tn+3½) Deselect X 1 1 Deselect X X — — Hi-Z Hi-Z — — Write X 1 X Deselect D2 D3 — — Hi-Z Hi-Z — — Read X X 1 Deselect X X — — Q2 Q3 — — Deselect V 1 0 Write D0 D1 D2 D3 Hi-Z Hi-Z — — Deselect V 0 X Read X X — — Q0 Q1 Q2 Q3 Read V X 0 Write D0 D1 D2 D3 Q2 Q3 — — Write V 0 X Read D2 D3 — — Q0 Q1 Q2 Q3 Notes: 1. “1” = input “high”; “0” = input “low”; “V” = input “valid”; “X” = input “don’t care” 2. “—” indicates that the input requirement or output state is determined by the next operation. 3. Q0, Q1, Q2, and Q3 indicate the first, second, third, and fourth pieces of output data transferred during Read operations. 4. D0, D1, D2, and D3 indicate the first, second, third, and fourth pieces of input data transferred during Write operations. 5. Users should not clock in metastable addresses. Preliminary GS81302DT19/37AGD-450/400/375/333 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.00a 5/2017 7/25 © 2017, GSI Technology |
同様の部品番号 - GS81302DT37AGD-375 |
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同様の説明 - GS81302DT37AGD-375 |
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