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AD4006 データシート(PDF) 6 Page - Analog Devices

部品番号 AD4006
部品情報  Precision, Pseudo Differential, SAR ADCs
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD4006 データシート(HTML) 6 Page - Analog Devices

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AD4002/AD4006/AD4010
Preliminary Technical Data
Rev. PrA | Page 6 of 36
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
POWER SUPPLIES
VDD
1.71
1.8
1.89
V
VIO
1.71
5.5
V
Standby Current
VDD and VIO = 1.8 V, T = 25°C
1.6
µA
Power Dissipation
VDD = 1.8 V, VIO = 1.8 V, VREF = 5 V
10 kSPS, high-Z mode disabled
70
µW
500 kSPS, high-Z mode disabled
3.5
4.2
mW
1 MSPS, high-Z mode disabled
7
8.2
mW
2 MSPS, high-Z mode disabled
14
16
mW
500 kSPS, high-Z mode enabled
4
5
mW
1 MSPS, high-Z mode enabled
8
9.9
mW
2 MSPS, high-Z mode enabled
16
19
mW
VDD Only
500 kSPS, high-Z mode disabled
2.5
mW
1 MSPS, high-Z mode disabled
4.9
mW
2 MSPS, high-Z mode disabled
9.75
mW
REF Only
500 kSPS, high-Z mode disabled
0.9
mW
1 MSPS, high-Z mode disabled
1.9
mW
2 MSPS, high-Z mode disabled
3.75
mW
VIO Only
500 kSPS, high-Z mode disabled
0.1
mW
1 MSPS, high-Z mode disabled
0.2
mW
2 MSPS, high-Z mode disabled
0.5
mW
Energy per Conversion
7
nJ/sample
TEMPERATURE RANGE
Specified Performance
TMIN to TMAX
−40
+125
°C
1
The acquisition phase is the time available for the input sampling capacitors to acquire a new input with the ADC running at a throughput rate of 2 MSPS for the
AD4002, 1 MSPS for the AD4006, and 500 kSPS for the AD4010.
2
A throughput rate of 2 MSPS can only be achieved with turbo mode enabled and a minimum SCK rate of 75 MHz. Refer to Table 4 for the maximum achievable
throughput for different modes of operation.
3
Transient response is the time required for the ADC to acquire a full-scale input step to ±0.5 LSB accuracy.
4
The minimum and maximum values are guaranteed by characterization, but not production tested.
5
See the 1/f noise plot in Figure 23.


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