IR2130/IR2132(J)(S) & (PbF)

2

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Symbol

Definition

Min.

Max.

Units

High Side Floating Supply Voltage

-0.3

625

High Side Floating Offset Voltage

High Side Floating Output Voltage

Low Side and Logic Fixed Supply Voltage

-0.3

25

Logic Ground

Low Side Output Voltage

-0.3

whichever is

lower

Operational Amplifier Output Voltage

Operational Amplifier Inverting Input Voltage

Allowable Offset Supply Voltage Transient

—

50

V/ns

≤ +25°C

(28 Lead DIP)

—

1.5

(28 Lead SOIC)

—

1.6

W

(44 Lead PLCC)

—

2.0

Thermal Resistance, Junction to Ambient

(28 Lead DIP)

—

83

(28 Lead SOIC)

—

78

°C/W

(44 Lead PLCC)

—

63

Junction Temperature

—

150

Storage Temperature

-55

150

Lead Temperature (Soldering, 10 seconds)

—

300

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.

(Please refer to the Design Tip DT97-3 for more details).

Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.

V

Symbol

Definition

Min.

Max.

Units

High Side Floating Supply Voltage

High Side Floating Offset Voltage

Note 1

600

High Side Floating Output Voltage

Low Side and Logic Fixed Supply Voltage

10

20

Logic Ground

-5

5

Low Side Output Voltage

0

Operational Amplifier Output Voltage

Operational Amplifier Inverting Input Voltage

Ambient Temperature

-40

125

°C

V

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the

with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.

°C